na2 standard cell family
2-I/P NAND gate
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The na2_x1 is a single stage 2-NAND with P/N ratio of 1.7. The na2_x4 is a 3 stage 2-NAND with stage efforts of about 0.9 and 3.9.
nq:(i0*i1)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
i1
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
na2_x1
1.3
40
2.20
0.69
9.1
4.5f
48
2.96
36
1.93
na2_x4
2.3
70
3.85
2.43
60.1
5.4f
152
0.76
136
0.61
na2_x1
Effort
FO4
Log.
i0
/\
1.30
1.34
¯_
i1
/\
1.22
1.28
¯_
na2_x4
Effort
FO4
Log.
i0
/\
2.16
0.40
¯_
i1
/\
2.27
0.42
¯_
Web data book for the ssxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 16 JUL 2007