cgi2a standard cell family

carry generator inverting with inverted input
cgi2a symbol
The output is the inverted carry of the inverse of pin a and pin b and carry input c, with the delay from pin c being favoured. The cells here use a P/N ratio of 2.
z:((a'*b)+(a'*c)+(b*c))' cell width power Generic 0.13um typical timing (ps & ps/fF), pin c.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vxlib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
cgi2a_x05 2.7  80 4.40 1.12  10.4  3.5f  59  5.86  54  4.11
cgi2a_x1 2.7  80 4.40 1.98  18.5  6.0f  56  3.00  51  2.04
cgi2a_x2 5.0 150 8.25 3.52  35.5 10.5f  56  1.58  52  1.10
cgi2a_x05
 
Effort
FO4 Log.
a /\
¯_ 2.98
b /\ 2.79 3.58
¯_
c /\ 1.81 2.03
¯_
cgi2a_x05 schematic cgi2a_x05 standard cell layout
cgi2a_x1
 
Effort
FO4 Log.
a /\
¯_ 2.51
b /\ 2.62 3.38
¯_
c /\ 1.63 1.77
¯_
cgi2a_x1 schematic cgi2a_x1 standard cell layout
cgi2a_x2
 
Effort
FO4 Log.
a /\
¯_ 2.33
b /\ 2.74 3.61
¯_
c /\ 1.57 1.63
¯_
cgi2a_x2 schematic cgi2a_x2 standard cell layout