oai21 standard cell family
2-OR into 2-NAND gate
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x1
drive strength cell, with a P/N ratio of about 1.28 for the
a1
and
a2
inputs, and about 2.4 for the
b
input.
z:((a1+a2)*b)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
a2
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vgalib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
oai21v0x1
2.7
64
3.52
0.81
14.7
4.9f
73
4.48
40
2.06
oai21v0x1
Effort
FO4
Log.
a1
/\
1.92
1.92
¯_
a2
/\
1.73
1.87
¯_
b
/\
1.20
1.26
¯_
Web data book for the vgalib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 06 JUL 2007